Invention Grant
- Patent Title: Method of manufacturing semiconductor package
- Patent Title (中): 制造半导体封装的方法
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Application No.: US13210607Application Date: 2011-08-16
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Publication No.: US08524539B2Publication Date: 2013-09-03
- Inventor: Hee-Jin Lee , Joong-Hyun Baek
- Applicant: Hee-Jin Lee , Joong-Hyun Baek
- Applicant Address: KR Suwon-si
- Assignee: SAMASUNG Electronics Co., Ltd.
- Current Assignee: SAMASUNG Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Stanzione & Kim, LLP
- Priority: KR10-2010-0079462 20100817
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
Provided are a semiconductor package of a semiconductor chip, a semiconductor module, an electronic system, and methods of manufacturing the same. The method includes mounting a semiconductor chip on a package substrate, forming a molding member on the semiconductor chip, forming via holes penetrating the molding member to expose a portion of a top surface of the semiconductor chip, the via holes being arranged in a lattice shape in a plan view, and forming thermally conductive via plugs in the via holes.
Public/Granted literature
- US20120045871A1 METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE Public/Granted day:2012-02-23
Information query
IPC分类: