Invention Grant
- Patent Title: Method of manufacturing heterojunction bipolar transistor and heterojunction bipolar transistor
- Patent Title (中): 异质结双极晶体管和异质结双极晶体管的制造方法
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Application No.: US13547067Application Date: 2012-07-12
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Publication No.: US08524551B2Publication Date: 2013-09-03
- Inventor: Philippe Meunier-Beillard , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Tony Vanhoucke
- Applicant: Philippe Meunier-Beillard , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Tony Vanhoucke
- Applicant Address: NL Eindhvoen
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhvoen
- Priority: EP10150681 20100113
- Main IPC: H01L21/337
- IPC: H01L21/337

Abstract:
A method of forming a heterojunction bipolar transistor by depositing a first stack comprising an polysilicon layer and a sacrificial layer on a mono-crystalline silicon substrate surface; patterning that stack to form a trench extending to the substrate; depositing a silicon layer over the resultant structure; depositing a silicon-germanium-carbon layer over the resultant structure; selectively removing the silicon-germanium-carbon layer from the sidewalls of the trench; depositing a boron-doped silicon-germanium-carbon layer over the resultant structure; depositing a further silicon-germanium-carbon layer over the resultant structure; depositing a boron-doped further silicon layer over the resultant structure; forming dielectric spacers on the trench sidewalls; filling the trench with emitter material; exposing polysilicon regions outside the trench side walls by selectively removing the sacrificial layer; implanting boron impurities into the exposed polysilicon regions to define base implants; and exposing the resultant structure to a thermal budget for annealing the boron impurities.
Public/Granted literature
- US20130178037A1 METHOD OF MANUFACTURING HETEROJUNCTION BIPOLAR TRANSISTOR AND HETEROJUNCTION BIPOLAR TRANSISTOR Public/Granted day:2013-07-11
Information query
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