Invention Grant
- Patent Title: Methods of forming an isolation layer and methods of manufacturing semiconductor devices having an isolation layer
- Patent Title (中): 形成隔离层的方法和制造具有隔离层的半导体器件的方法
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Application No.: US13109527Application Date: 2011-05-17
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Publication No.: US08524569B2Publication Date: 2013-09-03
- Inventor: Dae-Hyuk Kang , Jung-Won Lee , Bo-Un Yoon , Kun-Tack Lee
- Applicant: Dae-Hyuk Kang , Jung-Won Lee , Bo-Un Yoon , Kun-Tack Lee
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2010-0045900 20100517
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/331 ; H01L21/336

Abstract:
In a method of forming an isolation layer, first and second trenches are formed on a substrate. The first and the second trenches have first and second widths, respectively, and the second width is greater than the first width. A second isolation layer pattern partially fills the second trench. A first isolation layer pattern and the third isolation layer pattern are formed. The first isolation layer pattern fills the first trench, and the third isolation layer pattern is formed on the second isolation layer pattern and fills a remaining portion of the second trench.
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