Invention Grant
US08525167B2 Laminated chips package, semiconductor substrate and method of manufacturing the laminated chips package 有权
层叠芯片封装,半导体衬底及其制造方法

Laminated chips package, semiconductor substrate and method of manufacturing the laminated chips package
Abstract:
In a laminated chip package, a plurality of semiconductor plates each having a semiconductor device and a wiring electrode connected to the semiconductor device are laminated. On a side surface for wiring of the laminated chip package, an end face of an inner electrode for examination formed inside the side surface for wiring in the semiconductor plate is formed. The laminated chip package further has an outer electrode for examination connecting the end faces of the inner electrodes for examination along a lamination direction of the semiconductor plates, only for two adjacent semiconductor plates among the semiconductor plates.
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