Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
- Patent Title (中): 半导体器件及其制造方法
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Application No.: US13165997Application Date: 2011-06-22
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Publication No.: US08525306B2Publication Date: 2013-09-03
- Inventor: Yukinori Tashiro , Yoshinori Miyaki
- Applicant: Yukinori Tashiro , Yoshinori Miyaki
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Mattingly & Malur, PC
- Priority: JP2010-163671 20100721
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
To suppress a short circuit between neighboring wires which is caused when the loop of a wire is formed into multiple stages in a semiconductor device in which a wiring board and one semiconductor chip mounted over a main surface thereof are electrically coupled with the wire. In a semiconductor device in which a chip is mounted on an upper surface of a wiring board and a bonding lead of the wiring board and a bonding pad of the chip are electrically coupled with wires, a short circuit between the neighboring wires is suppressed by making larger the diameter of the longest wire arranged in a position closest to a corner part of the chip than the diameter of the other wires.
Public/Granted literature
- US20120018859A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2012-01-26
Information query
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