Invention Grant
- Patent Title: Area array quad flat no-lead (QFN) package
- Patent Title (中): 区域阵列四边形无引线（QFN）封装
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Application No.: US13208822Application Date: 2011-08-12
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Publication No.: US08525312B2Publication Date: 2013-09-03
- Inventor: Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
- Applicant: Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
- Applicant Address: US CA San Jose
- Assignee: Tessera, Inc.
- Current Assignee: Tessera, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L21/50 ; H01L21/60
Abstract:
A microelectronic assembly can include a microelectronic element and a lead frame having a first unit and a second unit overlying the first unit and assembled therewith. The first unit can have a first metal layer comprising a portion of the thickness of the lead frame and including terminals and first conductive elements extending away therefrom. The second unit can have a second metal layer comprising a portion of the thickness of the lead frame and including bond pads and second conductive elements extending away therefrom. The first and second units each can have an encapsulation supporting at least portions of the respective first and second conductive elements. At least some of the second conductive elements can overlie portions of corresponding ones of the first conductive elements and can be joined thereto. The microelectronic element can have contacts electrically connected with the bond pads of the lead frame.
Public/Granted literature
- US20130037925A1 AREA ARRAY QFN Public/Granted day:2013-02-14
Information query
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