Invention Grant
US08525350B2 Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumps
有权
用于倒装芯片封装的易熔I / O互连系统和方法,涉及基板安装的柱形凸块
- Patent Title: Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumps
- Patent Title (中): 用于倒装芯片封装的易熔I / O互连系统和方法,涉及基板安装的柱形凸块
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Application No.: US12731330Application Date: 2010-03-25
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Publication No.: US08525350B2Publication Date: 2013-09-03
- Inventor: Rajendra D. Pendse
- Applicant: Rajendra D. Pendse
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/49
- IPC: H01L23/49

Abstract:
A semiconductor device has a semiconductor die with bond pads formed on a surface of the semiconductor die. A UBM is formed over the bond pads of the semiconductor die. A fusible layer is formed over the UBM. The fusible layer can be tin or tin alloy. A substrate has bond pads formed on a surface of the substrate. A plurality of stud bumps containing non-fusible material is formed over the bond pads on the substrate. Each stud bump includes a wire having a first end attached to the bond pad of the substrate and second end of uniform height electrically connected to the bond pad of the semiconductor die by reflowing the fusible layer or applying thermal compression bonding. An underfill material is deposited between the semiconductor die and substrate. An encapsulant is deposited over the semiconductor die and substrate.
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