Invention Grant
- Patent Title: Voltage amplitude limiting circuit of full differential circuit
- Patent Title (中): 全差分电路的电压限幅电路
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Application No.: US13227558Application Date: 2011-09-08
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Publication No.: US08525571B2Publication Date: 2013-09-03
- Inventor: Chih Ying Huang , Wen Lung Shieh
- Applicant: Chih Ying Huang , Wen Lung Shieh
- Applicant Address: TW Taipei
- Assignee: C-Media Electronics Inc.
- Current Assignee: C-Media Electronics Inc.
- Current Assignee Address: TW Taipei
- Agency: Li & Cai Intellectual Property (USA) Office
- Priority: TW100107613A 20110307
- Main IPC: H03L5/00
- IPC: H03L5/00

Abstract:
A voltage amplitude limiting circuit of a full differential circuit is provided for limiting voltage levels of a differential signal. The voltage amplitude limiting circuit includes a reference voltage generating unit and a replacing circuit. The reference voltage generating unit generates a high reference voltage and a low reference voltage. The replacing circuit is coupled to the reference voltage generating unit, a first input terminal and a second input terminal. When voltage at the first input terminal is greater than the high reference voltage, the replacing circuit uses the high reference voltage to replace the voltage at the first input terminal to serve as an output. When voltage at the first input terminal is less than the low reference voltage, the replacing circuit uses the low reference voltage to replace the voltage at the first input terminal to serve as an output.
Public/Granted literature
- US20120229115A1 VOLTAGE AMPLITUDE LIMITING CIRCUIT OF FULL DIFFERENTIAL CIRCUIT Public/Granted day:2012-09-13
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