Invention Grant
- Patent Title: Digital to analog converter for phase locked loop
- Patent Title (中): 用于锁相环的数模转换器
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Application No.: US13351232Application Date: 2012-01-17
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Publication No.: US08525598B2Publication Date: 2013-09-03
- Inventor: Pravesh Kumar Saini
- Applicant: Pravesh Kumar Saini
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Main IPC: H03L7/00
- IPC: H03L7/00
Abstract:
A digital to analog converter (DAC) that reduces sub-threshold leakage current in PLLs includes three series connected transistors, a unity gain buffer, and a switch. The system is connected between the voltage-to-current converter and a current-controlled oscillator. The DAC receives and accurately mirrors a current signal generated by a voltage-to-current converter.
Public/Granted literature
- US20130181780A1 DIGITAL TO ANALOG CONVERTER FOR PHASE LOCKED LOOP Public/Granted day:2013-07-18
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