Invention Grant
US08526237B2 Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof 有权
具有读/写元件和读/写电路的3D阵列的非易失性存储器及其方法

Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof
Abstract:
A three-dimensional array is especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. A two-dimensional array of bit lines to which the memory elements of all planes are connected is oriented vertically from the substrate and through the plurality of planes. During sensing, to compensate for word line resistance, a sense amplifier references a stored reference value during sensing of a memory element at a given location of the word line. A layout with a row of sense amplifiers between two memory arrays is provided to facilitate the referencing. A selected memory element is reset without resetting neighboring ones when it is subject to a bias voltage under predetermined conditions.
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