Invention Grant
US08527822B2 System and method for single terminal boundary scan 有权
单端边界扫描的系统和方法

System and method for single terminal boundary scan
Abstract:
An electronic circuit having a boundary scan test circuit receives, though one pin, an embedded clock encoded test signal having an encoded bit stream having occurrences of a first header followed by at least one encoded boundary scan mode bit and an encoded second header followed by at least one boundary scan test input bit. The bit stream and the clock are extracted and occurrences of the first header and second header are detected. Based on the detected occurrences the boundary scan mode bits and boundary scan input bits are identified and distributed to the electronic circuit, along with the extracted clock, and boundary scan test is performed.
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