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US08527933B2 Layout technique for stress management cells 有权
压力管理细胞布局技术

Layout technique for stress management cells
Abstract:
An integrated circuit device layout is created based on charge carrier mobility characteristics of the device's non-functional cells. The charge carrier mobility of the non-functional cells can alter behavioral characteristics such as the hold time, setup time, or leakage current of nearby functional logic cells. Accordingly, a layout tool creates the layout for the integrated circuit device by selecting and placing non-functional cells having different mobility so as to selectively alter the characteristics of nearby logic cells.
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