Invention Grant
US08530338B2 Structures of and methods for forming vertically aligned Si wire arrays
有权
用于形成垂直排列的Si线阵列的结构和方法
- Patent Title: Structures of and methods for forming vertically aligned Si wire arrays
- Patent Title (中): 用于形成垂直排列的Si线阵列的结构和方法
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Application No.: US12176099Application Date: 2008-07-18
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Publication No.: US08530338B2Publication Date: 2013-09-10
- Inventor: Brendan M. Kayes , Michael A. Filler , Nathan S. Lewis , Harry A. Atwater
- Applicant: Brendan M. Kayes , Michael A. Filler , Nathan S. Lewis , Harry A. Atwater
- Applicant Address: US CA Pasadena
- Assignee: California Institute of Technology
- Current Assignee: California Institute of Technology
- Current Assignee Address: US CA Pasadena
- Agency: Gavrilovich, Dodd & Lindsey LLP
- Agent Joseph R. Baker, Jr.
- Main IPC: H01L29/72
- IPC: H01L29/72
Abstract:
A structure consisting of vertically aligned wire arrays on a Si substrate and a method for producing such wire arrays. The wire arrays are fabricated and positioned on a substrate with an orientation and density particularly adapted for conversion of received light to energy. A patterned oxide layer is used to provide for wire arrays that exhibit narrow diameter and length distribution and provide for controlled wire position.
Public/Granted literature
- US20090020853A1 STRUCTURES OF AND METHODS FOR FORMING VERTICALLY ALIGNED Si WIRE ARRAYS Public/Granted day:2009-01-22
Information query
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