Invention Grant
- Patent Title: Semiconductor device equipped with bonding wires and manufacturing method of semiconductor device equipped with bonding wires
- Patent Title (中): 配备有接合线的半导体装置和配备有接合线的半导体装置的制造方法
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Application No.: US13157491Application Date: 2011-06-10
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Publication No.: US08531013B2Publication Date: 2013-09-10
- Inventor: Teiji Shindo , Shinji Ota
- Applicant: Teiji Shindo , Shinji Ota
- Applicant Address: JP Tokyo
- Assignee: Casio Computer Co., Ltd.
- Current Assignee: Casio Computer Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Holtz, Holtz, Goodman & Chick, PC
- Priority: JP2010-134419 20100611; JP2010-134422 20100611; JP2010-134424 20100611; JP2011-112969 20110520
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
Disclosed is a semiconductor device including a printed-circuit board which includes a plurality of first electrodes, a plurality of second electrodes and a semiconductor chip on which a plurality of first connection pads are aligned in a first line being disposed along an outer circumference side of a top surface and a plurality of second connection pads are aligned in a second line being disposed inside of and apart from the first line, when the semiconductor chip is seen from above, and any of the plurality of first connection pads are used for a power voltage terminal and a system reset terminal of the semiconductor device.
Public/Granted literature
Information query
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