Invention Grant
- Patent Title: Substrate for semiconductor package and method of manufacturing thereof
- Patent Title (中): 半导体封装用基板及其制造方法
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Application No.: US13383895Application Date: 2010-06-25
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Publication No.: US08531023B2Publication Date: 2013-09-10
- Inventor: Akinobu Shibuya , Akira Ouchi
- Applicant: Akinobu Shibuya , Akira Ouchi
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2009-168831 20090717
- International Application: PCT/JP2010/004239 WO 20100625
- International Announcement: WO2011/007507 WO 20110120
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52

Abstract:
Disclosed is a substrate for a semiconductor package in which leakage of radiation noise from a gap between a semiconductor element and a mounting substrate can be prevented. The substrate for the semiconductor package includes a coplanar waveguide including a signal and ground electrodes on the mounting substrate, the signal electrode flip-chip connected to the semiconductor element, the ground electrodes arranged on both sides of the signal electrode with intervals therebetween. A step part is formed in the ground electrodes in an outer circumferential part of a mounting region of the semiconductor element, the step part having a larger distance between upper surfaces of the mounting substrate and the ground electrode in the outer circumferential part of the mounting region than such distance in the mounting region, and an insulator for covering the signal electrode in the outer circumferential part of the mounting region is formed.
Public/Granted literature
- US20120112344A1 SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THEREOF Public/Granted day:2012-05-10
Information query
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