Invention Grant
- Patent Title: Top layers of metal for high performance IC's
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Application No.: US11829110Application Date: 2007-07-27
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Publication No.: US08531038B2Publication Date: 2013-09-10
- Inventor: Mou-Shiung Lin
- Applicant: Mou-Shiung Lin
- Applicant Address: TW Hsinchu
- Assignee: Megica Corporation
- Current Assignee: Megica Corporation
- Current Assignee Address: TW Hsinchu
- Agency: Seyfarth Shaw LLP
- Main IPC: H01L23/29
- IPC: H01L23/29

Abstract:
A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an inter-metal dielectric thus enabling the integration of very small integrated circuits within a larger circuit environment at a minimum cost in electrical circuit performance.
Public/Granted literature
- US20070262457A1 Top layers of metal for high performance IC's Public/Granted day:2007-11-15
Information query
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