Invention Grant
- Patent Title: Methods for testing a memory embedded in an integrated circuit
- Patent Title (中): 测试嵌入在集成电路中的存储器的方法
-
Application No.: US13613630Application Date: 2012-09-13
-
Publication No.: US08531899B2Publication Date: 2013-09-10
- Inventor: Shayan Zhang , James D. Burnett , Kent P. Fancher , Andrew C. Russell , Michael D. Snyder
- Applicant: Shayan Zhang , James D. Burnett , Kent P. Fancher , Andrew C. Russell , Michael D. Snyder
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Sherry W. Schumm; James L. Clingan, Jr.
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A memory system has a first memory having an array of memory cells that includes a redundant column. The redundant column substitutes for a first column in the array. The first column includes a test memory cell. The array receives a power supply voltage. The test memory cell becomes non-functional at a higher power supply voltage than the memory cells of the array. A memory controller is coupled to the first memory and is for determining if the test memory cell is functional at a first value for the power supply voltage. This is useful in making decisions concerning the value of the power supply voltage applied to the array.
Public/Granted literature
- US20130019133A1 METHODS FOR TESTING A MEMORY EMBEDDED IN AN INTEGRATED CIRCUIT Public/Granted day:2013-01-17
Information query