Invention Grant
US08533377B2 System and method for allocating transaction ID in a system with a plurality of processing modules
有权
用于在具有多个处理模块的系统中分配事务ID的系统和方法
- Patent Title: System and method for allocating transaction ID in a system with a plurality of processing modules
- Patent Title (中): 用于在具有多个处理模块的系统中分配事务ID的系统和方法
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Application No.: US13118376Application Date: 2011-05-28
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Publication No.: US08533377B2Publication Date: 2013-09-10
- Inventor: Venkat Rao Vallapaneni , Srinivasa Rao Kothamasu , Sakthivel Komarasamy Pullagoundapatti
- Applicant: Venkat Rao Vallapaneni , Srinivasa Rao Kothamasu , Sakthivel Komarasamy Pullagoundapatti
- Applicant Address: US CA San Jose
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA San Jose
- Agency: Mendelsohn, Drucker & Dunleavy, P.C.
- Agent Steve Mendelsohn
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F13/364
Abstract:
A system and method for allocating transaction ID in a system with a plurality of processing modules is disclosed. In one embodiment, a method for assigning transaction ID to a processing module in a network on a chip system (NOCS) with a plurality of processing modules is disclosed. An address space is provided to each of the processing modules. A portion of the address space is selected. A subset of the selected portion of the address space for each of the processing module is selected as Valid Bits. The Valid Bits of the processing module is associated to a transaction ID.
Public/Granted literature
- US20120303848A1 SYSTEM AND METHOD FOR ALLOCATING TRANSACTION ID IN A SYSTEM WITH A PLURALITY OF PROCESSING MODULES Public/Granted day:2012-11-29
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