Invention Grant
- Patent Title: Implementing direct access caches in coherent multiprocessors
- Patent Title (中): 在一致的多处理器中实现直接访问缓存
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Application No.: US10331688Application Date: 2002-12-30
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Publication No.: US08533401B2Publication Date: 2013-09-10
- Inventor: Samantha J. Edirisooriya , Sujat Jamil , David E. Miner , R. Frank O'Bleness , Steven J. Tu , Hang T. Nguyen
- Applicant: Samantha J. Edirisooriya , Sujat Jamil , David E. Miner , R. Frank O'Bleness , Steven J. Tu , Hang T. Nguyen
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F12/00
- IPC: G06F12/00
Abstract:
Non-processor agents, such as bus agents, may directly access processor caches. A coherency protocol ensures that cache coherency is maintained.
Public/Granted literature
- US20040128450A1 Implementing direct access caches in coherent multiprocessors Public/Granted day:2004-07-01
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