Invention Grant
- Patent Title: Fault tolerant power sequencer
- Patent Title (中): 容错功率定序器
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Application No.: US12639801Application Date: 2009-12-16
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Publication No.: US08533528B2Publication Date: 2013-09-10
- Inventor: David Maciorowski
- Applicant: David Maciorowski
- Applicant Address: US TX Houston
- Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee Address: US TX Houston
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
A system comprising a plurality of subsystems and a master power sequencer. Each of the plurality of subsystems is coupled to an associated power switch and an associated slave power sequencer. The master power sequencer is coupled to each of the slave power sequencers and each of the power switches. Upon a slave power sequencer identifying a fault with its associated subsystem, the master power sequencer determines whether to provide power to any other subsystem. Further, the master power sequencer is configured to send a signal to each of the power switches indicating whether to provide power to the subsystem associated with each of the power switches.
Public/Granted literature
- US20110145604A1 FAULT TOLERANT POWER SEQUENCER Public/Granted day:2011-06-16
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