Invention Grant
- Patent Title: Partitioned through-layer via and associated systems and methods
- Patent Title (中): 分层通过层和通过相关的系统和方法
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Application No.: US13757295Application Date: 2013-02-01
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Publication No.: US08536046B2Publication Date: 2013-09-17
- Inventor: Teck Kheng Lee
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology
- Current Assignee: Micron Technology
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Priority: SG200706414-0 20070831
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
Partitioned vias, interconnects, and substrates that include such vias and interconnects are disclosed herein. In one embodiment, a substrate has a non-conductive layer and a partitioned via formed in a portion of the non-conductive layer. The non-conductive layer includes a top side, a bottom side, and a via hole extending between the top and bottom sides and including a sidewall having a first section a second section. The partitioned via includes a first metal interconnect within the via on the first section of the sidewall and a second metal interconnect within the via hole on the second section of the sidewall and electrically isolated from the first metal interconnect. In another embodiment, the first metal interconnect is separated from the second metal interconnect by a gap within the via hole.
Public/Granted literature
- US20130145619A1 PARTITIONED THROUGH-LAYER VIA AND ASSOCIATED SYSTEMS AND METHODS Public/Granted day:2013-06-13
Information query
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