Single metal gate CMOS integration by intermixing polarity specific capping layers

Invention Grant

US08541275B2 Single metal gate CMOS integration by intermixing polarity specific capping layers 有权

Title translation: 单金属门CMOS集成通过混合极性特定的封盖层

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Patent Title: Single metal gate CMOS integration by intermixing polarity specific capping layers
Patent Title (中): 单金属门CMOS集成通过混合极性特定的封盖层
Application No.: US12616941

Application Date: 2009-11-12
Publication No.: US08541275B2

Publication Date: 2013-09-24
Inventor: Sivananda Kanakasabapathy , Hemanth Jagannathan , Matthew Copel
Applicant: Sivananda Kanakasabapathy , Hemanth Jagannathan , Matthew Copel
Applicant Address: US NY Armonk
Assignee: International Business Machines Corporation
Current Assignee: International Business Machines Corporation
Current Assignee Address: US NY Armonk
Agency: Tutunjian & Bitetto, P.C.
Agent Louis J. Percello
Main IPC: H01L21/8238
IPC: H01L21/8238

Single metal gate CMOS integration by intermixing polarity specific capping layers

Abstract:

A method for forming a complementary metal oxide semiconductor device includes forming a first capping layer on a dielectric layer, blocking portions in the capping layer in regions where the capping layer is to be preserved using a block mask. Exposed portions of the first capping layer are intermixed with the dielectric layer to form a first intermixed layer. The block mask is removed. The first capping layer and the first intermixed layer are etched such that the first capping layer is removed to re-expose the dielectric layer in regions without removing the first intermixed layer.

Abstract(Chinese):

用于形成互补金属氧化物半导体器件的方法包括在电介质层上形成第一覆盖层，使用阻挡掩模阻挡覆盖层在要被保持的区域中的部分。第一覆盖层的暴露部分与电介质层混合以形成第一混合层。去除块掩模。蚀刻第一覆盖层和第一混合层，使得除去第一覆盖层以在不去除第一混合层的情况下再次暴露在区域中的电介质层。

Public/Granted literature

US20110108921A1 SINGLE METAL GATE CMOS INTEGRATION BY INTERMIXING POLARITY SPECIFIC CAPPING LAYERS Public/Granted day:2011-05-12

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS