Invention Grant
- Patent Title: Method for manufacturing a semiconductor device having high-voltage and low-voltage transistors
- Patent Title (中): 制造具有高电压和低压晶体管的半导体器件的方法
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Application No.: US12887846Application Date: 2010-09-22
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Publication No.: US08541279B2Publication Date: 2013-09-24
- Inventor: Yuichiro Kitajima
- Applicant: Yuichiro Kitajima
- Applicant Address: JP Chiba
- Assignee: Seiko Instruments Inc.
- Current Assignee: Seiko Instruments Inc.
- Current Assignee Address: JP Chiba
- Agency: Binks Hofer Gilson & Lione
- Priority: JP2009-219781 20090924
- Main IPC: H01L21/8234
- IPC: H01L21/8234

Abstract:
By covering ends of a field insulating film in a region where a MOS transistor having a relatively thin gate insulating film is formed with a relatively thick gate insulating film, a channel region of the MOS transistor having the relatively thin gate insulating film is set apart from an inversion-preventing diffusion layer formed under the field insulating film so as not to be influenced by film thickness fluctuation of the field insulating film, etching fluctuation of the relatively thick gate insulating film, and impurity concentration fluctuation at both sides of the channel due to the inversion-preventing diffusion layer.
Public/Granted literature
- US20110068412A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2011-03-24
Information query
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