Invention Grant
- Patent Title: Domino logic circuits and pipelined domino logic circuits
- Patent Title (中): 多米诺逻辑电路和流水线多米诺逻辑电路
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Application No.: US13234811Application Date: 2011-09-16
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Publication No.: US08542033B2Publication Date: 2013-09-24
- Inventor: Hyoung-Wook Lee , Gun-Ok Jung , Suhwan Kim , Ah-Reum Kim , Rahul Singh
- Applicant: Hyoung-Wook Lee , Gun-Ok Jung , Suhwan Kim , Ah-Reum Kim , Rahul Singh
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2010-0123239 20101206
- Main IPC: H03K19/00
- IPC: H03K19/00

Abstract:
A domino logic circuit includes a first evaluation unit, a second evaluation unit and an output unit. The first evaluation unit precharges a first dynamic node, discharges a footer node in a first phase of a clock signal, and evaluates a plurality of input signals to determine a logic level of the first dynamic node in a second phase of the clock signal. The second evaluation unit precharges a second dynamic node in the first phase of the clock signal, and determines a logic level of the second dynamic node in response to a logic level of the footer node in the second phase of the clock signal. The output unit provides an output signal having a logic level according to levels of a first voltage of the first dynamic node and a second voltage of the second dynamic node.
Public/Granted literature
- US20120139584A1 DOMINO LOGIC CIRCUITS AND PIPELINED DOMINO LOGIC CIRCUITS Public/Granted day:2012-06-07
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