Invention Grant
- Patent Title: Techniques for identifying and reducing block artifacts
- Patent Title (中): 用于识别和减少块伪像的技术
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Application No.: US12860276Application Date: 2010-08-20
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Publication No.: US08542751B2Publication Date: 2013-09-24
- Inventor: Nilesh A. Ahuja , Jorge E. Caviedes
- Applicant: Nilesh A. Ahuja , Jorge E. Caviedes
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Glen B Choi
- Main IPC: H04N11/02
- IPC: H04N11/02

Abstract:
Techniques are described that can be used to identify blocking artifacts in both vertical and horizontal directions. For blocking artifacts in a vertical direction, a horizontal gradient is determined for a pixel. Gradient smoothing is performed for pixels in the row of the pixel. A ratio of the horizontal gradient over the gradient smoothing is determined. Any pixel with a ratio above a threshold and in a segment with a length that exceeds a threshold length as potentially having block artifacts. Each column with pixels that potentially have block artifacts is inspected to determine whether a number of block artifacts in the column are a local maximum and whether there is a sufficient number of blocking artifacts in the column. Columns that satisfy both conditions are considered to include blocking artifacts.
Public/Granted literature
- US20120044989A1 TECHNIQUES FOR IDENTIFYING BLOCK ARTIFACTS Public/Granted day:2012-02-23
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