Invention Grant
- Patent Title: Method of performing a chip burn-in scanning with increased efficiency
- Patent Title (中): 以更高效率进行芯片老化扫描的方法
-
Application No.: US13291041Application Date: 2011-11-07
-
Publication No.: US08543877B2Publication Date: 2013-09-24
- Inventor: Wei-Ju Chen , Shi-Huei Liu , Lien-Sheng Yang
- Applicant: Wei-Ju Chen , Shi-Huei Liu , Lien-Sheng Yang
- Applicant Address: TW Hsinchu
- Assignee: Etron Technology, Inc.
- Current Assignee: Etron Technology, Inc.
- Current Assignee Address: TW Hsinchu
- Agent Winston Hsu; Scott Margo
- Priority: TW99140510A 20101124
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
Utilize a pattern generator to write a predetermined logic voltage to each memory cell of a memory chip. Read a predetermined logic voltage stored in the memory cell. Compare the predetermined logic voltage stored in the memory cell with the predetermined logic voltage to determine if the memory cell is a good memory cell or not and store a determination result corresponding to the memory cell in a data latch of the memory chip. And determine if the memory chip is a good memory chip or not according to determination results of all memory cells of the memory chip stored in the data latch of the memory chip.
Public/Granted literature
- US20120131398A1 METHOD OF performing A CHIP BURN-IN SCANNING with increased EFFICIENCY Public/Granted day:2012-05-24
Information query