Invention Grant
US08543959B2 Bonding controller guided assessment and optimization for chip-to-chip stacking
有权
键合控制器引导评估和优化,用于芯片到芯片堆叠
- Patent Title: Bonding controller guided assessment and optimization for chip-to-chip stacking
- Patent Title (中): 键合控制器引导评估和优化,用于芯片到芯片堆叠
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Application No.: US13087464Application Date: 2011-04-15
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Publication No.: US08543959B2Publication Date: 2013-09-24
- Inventor: Gary Dale Carpenter , Alan James Drake , Eren Kursun
- Applicant: Gary Dale Carpenter , Alan James Drake , Eren Kursun
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Garg Law Firm, PLLC
- Agent Rakesh Garg; John Flynn
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method, system, and computer program product for performance-based chip-to-chip stacking are provided in the illustrative embodiments. A first candidate chip is selected from a set of candidate chips for stacking, each candidate chip in the set of candidate chips including an integrated circuit. A part of a 3D performance determinant is activated in the first candidate chip. A value of a performance parameter is measured for a set of operating conditions. A stacked performance value is computed for the first candidate chip using the value. A subset of the set of candidate chips is stacked in a stack, the subset including the first candidate chip, such that a combined value of the performance parameter for the subset when stacked in a first order is within a defined range of values for the performance parameter.
Public/Granted literature
- US20120266125A1 BONDING CONTROLLER GUIDED ASSESSMENT AND OPTIMIZATIONFOR CHIP-TO-CHIP STACKING Public/Granted day:2012-10-18
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