Invention Grant
US08543993B2 Compiler, compile method, and processor core control method and processor
失效
编译器,编译方法和处理器核心控制方法和处理器
- Patent Title: Compiler, compile method, and processor core control method and processor
- Patent Title (中): 编译器,编译方法和处理器核心控制方法和处理器
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Application No.: US12726526Application Date: 2010-03-18
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Publication No.: US08543993B2Publication Date: 2013-09-24
- Inventor: Koichiro Yamashita
- Applicant: Koichiro Yamashita
- Applicant Address: JP Kanagawa
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kanagawa
- Agency: Arent Fox LLP
- Main IPC: G06F9/45
- IPC: G06F9/45

Abstract:
A compiler compiling a source code and is implemented in a plurality of processor cores includes a parallel loop processing detection unit configured to detect from the source code a loop processing code for execution of an internal processing operation for a given number of repeating times, and an independent parallel loop processing code in the internal processing operation performed for each repetition to be concurrently processed, and a dynamic parallel conversion unit configured to generate a control core code for control of the number of repeating times in the parallel loop processing code and a parallel processing code for changing the number of repeating times corresponding to the control from the control core code.
Public/Granted literature
- US20100235611A1 COMPILER, COMPILE METHOD, AND PROCESSOR CORE CONTROL METHOD AND PROCESSOR Public/Granted day:2010-09-16
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