Invention Grant
- Patent Title: Manufacturing integrated circuit components having multiple gate oxidations
- Patent Title (中): 制造具有多栅极氧化的集成电路元件
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Application No.: US13262307Application Date: 2009-04-30
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Publication No.: US08546268B2Publication Date: 2013-10-01
- Inventor: Wilson Entalai , Jerry Liew
- Applicant: Wilson Entalai , Jerry Liew
- Applicant Address: DE Erfurt
- Assignee: X-FAB Semiconductor Foundries AG
- Current Assignee: X-FAB Semiconductor Foundries AG
- Current Assignee Address: DE Erfurt
- Agency: Stevens & Showalter LLP
- International Application: PCT/IB2009/051773 WO 20090430
- International Announcement: WO2010/125428 WO 20101104
- Main IPC: H01L21/302
- IPC: H01L21/302
Abstract:
STI divot formation is minimized and STI field height mismatch between different regions is eliminated. A nitride cover layer (150) having a thickness less than 150 then a oxide cover layer (160) having a thickness less than 150 is deposited acting as implant buffer after pad oxide removal following the STI CMP process. This nitride or oxide stack is selectively removed by masking prior to gate oxidation of each LV (low voltage) region (GX1), MV (intermediate voltage) region (GX3) and HV (high voltage) region (GX5) respectively followed by a gate poly deposition.
Public/Granted literature
- US20120034783A1 MANUFACTURING INTEGRATED CIRCUIT COMPONENTS HAVING MULTIPLE GATE OXIDATIONS Public/Granted day:2012-02-09
Information query
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