Invention Grant
- Patent Title: Shallow trench isolation for a memory
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Application No.: US13315337Application Date: 2011-12-09
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Publication No.: US08546856B2Publication Date: 2013-10-01
- Inventor: Alessandro Grossi , Marcello Mariani , Paolo Cappelletti
- Applicant: Alessandro Grossi , Marcello Mariani , Paolo Cappelletti
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: H01L29/76
- IPC: H01L29/76

Abstract:
In some embodiments, a gate structure with a spacer on its side may be used as a mask to form self-aligned trenches in a microelectronic memory, such as a flash memory. A first portion of the gate structure may be used to form the mask, together with sidewall spacers, in some embodiments. Then, after forming the shallow trench isolations, a second portion of the gate structure may be added to form a mushroom shaped gate structure.
Public/Granted literature
- US08664702B2 Shallow trench isolation for a memory Public/Granted day:2014-03-04
Information query
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