Invention Grant
- Patent Title: Semiconductor integrated circuit device
- Patent Title (中): 半导体集成电路器件
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Application No.: US13064599Application Date: 2011-04-01
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Publication No.: US08546913B2Publication Date: 2013-10-01
- Inventor: Masatake Wada , Naoki Imakita
- Applicant: Masatake Wada , Naoki Imakita
- Applicant Address: JP Kawasaki, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2010-085686 20100204; JP2011-046790 20110303
- Main IPC: H01L27/118
- IPC: H01L27/118 ; H01L23/52

Abstract:
A capacitance cell includes a substrate structure layer having pair diffusion regions, and an interconnect layer having pair of power supply lines. The capacitance cell also includes a capacitance composed of a first electrode, a dielectric member and a second electrode stacked together, and is formed in a frame shape and disposed in a space between the substrate structure layer and the interconnect layer so as to extend along an outer rim of the frame shape of a standard cell region in which a standard cell is arranged. The capacitance cell also includes a first substrate contact that electrically connects one of the pair of power supply lines to one of the diffusion regions externally of the standard cell region. The capacitance cell also includes a second substrate contact that electrically connects the other power supply line to the other diffusion region, externally of the standard cell region. The capacitance cell further includes a first capacitance contact electrically connecting the first electrode to the other diffusion region internally of the standard cell region, and a second capacitance contact electrically connecting the second electrode to the one power supply line internally of the standard cell region.
Public/Granted literature
- US20110204477A1 Semiconductor integrated circuit device Public/Granted day:2011-08-25
Information query
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