Invention Grant
- Patent Title: 3D integration microelectronic assembly for integrated circuit devices
- Patent Title (中): 集成电路器件的3D集成微电子组件
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Application No.: US13157207Application Date: 2011-06-09
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Publication No.: US08546951B2Publication Date: 2013-10-01
- Inventor: Vage Oganesian
- Applicant: Vage Oganesian
- Applicant Address: US CA Palo Alto
- Assignee: Optiz, Inc.
- Current Assignee: Optiz, Inc.
- Current Assignee Address: US CA Palo Alto
- Agency: DLA Piper LLP (US)
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
A 3D interposer (and method of making same) that includes a crystalline substrate handler having opposing first and second surfaces, with a cavity formed into the first surface. A layer of insulation material is formed on the surface of the handler that defines the cavity. The cavity is filled with a compliant dielectric material. A plurality of electrical interconnects is formed through the interposer. Each electrical interconnect includes a first hole formed through the crystalline substrate handler extending from the second surface to the cavity, a second hole formed through the compliant dielectric material so as to extend from and be aligned with the first hole, a layer of insulation material formed along a sidewall of the first hole, and conductive material extending through the first and second holes.
Public/Granted literature
- US20120313255A1 3D Integration Microelectronic Assembly For Integrated Circuit Devices And Method Of Making Same Public/Granted day:2012-12-13
Information query
IPC分类: