A method includes receiving a memory code identifying a number of logic zeroes and logic ones to be stored in a semiconductor memory, determining a number of bit cells of a first type that are to be coupled to a first bit line of the semiconductor memory from the memory code, and selecting a first keeper circuit from a plurality of keeper circuits based on the number of bit cells of the first type that are to be coupled to the first bit line. An electronic representation of a layout of the semiconductor memory is stored in a non-volatile machine readable storage medium.