Automatic recalculation of tuner filter coefficients are made in order to compensate for changes in signal properties due to processing functionality in the tuner. The architecture compensates for processing changes, such as a large continuous range of clock frequency shifts, while not sacrificing bandwidth response characteristics of the channel filter. Embodiments may calculate coefficients in order to obtain response characteristics while utilizing a completely on-chip architecture, which does not require accessing off-chip software driver programs, and does not require complex look-up tables containing filter coefficients stored in onboard memory.