Invention Grant
- Patent Title: Receiver with clock recovery circuit and adaptive sample and equalizer timing
-
Application No.: US12523042Application Date: 2007-12-13
-
Publication No.: US08548110B2Publication Date: 2013-10-01
- Inventor: Qi Lin , Brian Leibowitz , Hae-Chang Lee , Jihong Ren , Kyung Suk Oh , Jared Zerbe
- Applicant: Qi Lin , Brian Leibowitz , Hae-Chang Lee , Jihong Ren , Kyung Suk Oh , Jared Zerbe
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Silicon Edge Law Group LLP
- Agent Arthur J. Behiel
- International Application: PCT/US2007/025634 WO 20071213
- International Announcement: WO2008/085299 WO 20080717
- Main IPC: H04L7/00
- IPC: H04L7/00

Abstract:
A receiver is equipped with an adaptive phase-offset controller and associated timing-calibration circuitry that together shift the timing for a data sampler and a digital equalizer. The sample and equalizer timing is shifted to a position with less residual inter-symbol interference (ISI) energy relative to the current symbol. The shifted position may be calculated using a measure of signal quality, such as a receiver bit-error rate or a comparison of filter-tap values, to optimize the timing of data recovery.
Public/Granted literature
- US20100135378A1 Receiver with Clock Recovery Circuit and Adaptive Sample and Equalizer Timing Public/Granted day:2010-06-03
Information query