Invention Grant
- Patent Title: Die expansion bus
- Patent Title (中): 模扩展总线
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Application No.: US13249218Application Date: 2011-09-29
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Publication No.: US08549463B2Publication Date: 2013-10-01
- Inventor: Agarwala Sanjive
- Applicant: Agarwala Sanjive
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Robert D. Marshall, Jr.; Wade James Brady, III; Frederick J. Telecky, Jr.
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F13/00 ; H05K7/10 ; G06F13/36 ; H03K19/177

Abstract:
A die expansion bus efficiently couples a supplemental portion of a processing system to an original portion of the processing system on a die. The die expansion bus couples bus subsystems of the supplemental portion of the processing system to the bus subsystems of the original portion of the processing system. The original portion of the processing system is arranged to control the data resources of the supplemental portion of the processing system by accessing memory mapped control registers associated with the bus subsystems of the supplemental portion of the processing system.
Public/Granted literature
- US20120084483A1 DIE EXPANSION BUS Public/Granted day:2012-04-05
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