Invention Grant
- Patent Title: Fabricating process of circuit substrate
- Patent Title (中): 电路基板的制造工艺
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Application No.: US12879312Application Date: 2010-09-10
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Publication No.: US08549745B2Publication Date: 2013-10-08
- Inventor: Chen-Yueh Kung
- Applicant: Chen-Yueh Kung
- Applicant Address: TW New Taipei
- Assignee: VIA Technologies, Inc.
- Current Assignee: VIA Technologies, Inc.
- Current Assignee Address: TW New Taipei
- Agency: J.C. Patents
- Priority: TW99124535A 20100726
- Main IPC: H01K3/10
- IPC: H01K3/10

Abstract:
A process for fabricating process a circuit substrate having a base layer, a first patterned conductive layer, a dielectric layer, a conductive block and a second patterned conductive layer. The first patterned conductive layer is disposed on the base layer and has a first pad. The dielectric layer is disposed on the base layer and covers the first patterned conductive layer, wherein the dielectric layer has an opening and the first pad is exposed by the opening. The conductive block is disposed in the opening and covers the first pad. The second patterned conductive layer is disposed on a surface of the dielectric layer and has a second pad, wherein the second pad and the conductive block are integrally formed.
Public/Granted literature
- US20120018207A1 CIRCUIT SUBSTRATE AND FABRICATING PROCESS OF CIRCUIT SUBSTRATE Public/Granted day:2012-01-26
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