Invention Grant
- Patent Title: Low series resistance transistor structure on silicon on insulator layer
- Patent Title (中): 硅绝缘体层上的低串联电阻晶体管结构
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Application No.: US13622712Application Date: 2012-09-19
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Publication No.: US08551872B2Publication Date: 2013-10-08
- Inventor: Kangguo Chen , Bruce B. Doris , Balasubramanian S. Haran , Amlan Majumdar , Sanjay Mehta
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Harrington & Smith
- Main IPC: H01L21/22
- IPC: H01L21/22

Abstract:
A transistor structure includes a channel located in an extremely thin silicon on insulator (ETSOI) layer and disposed between a raised source and a raised drain, a gate structure having a gate conductor disposed over the channel and between the source and the drain, and a gate spacer layer disposed over the gate conductor. The raised source and the raised drain each have a facet that is upwardly sloping away from the gate structure. A lower portion of the source and a lower portion of the drain are separated from the channel by an extension region containing a dopant species diffused from a dopant-containing glass.
Public/Granted literature
- US20130175625A1 LOW SERIES RESISTANCE TRANSISTOR STRUCTURE ON SILICON ON INSULATOR LAYER Public/Granted day:2013-07-11
Information query
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