Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US13022812Application Date: 2011-02-08
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Publication No.: US08552511B2Publication Date: 2013-10-08
- Inventor: Masashi Shima
- Applicant: Masashi Shima
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78

Abstract:
A semiconductor device including a low-concentration impurity region formed on the drain side of an n-type MIS transistor, in a non-self-aligned manner with respect to an end portion of the gate electrode. A high-concentration impurity region is placed with a specific offset from the gate electrode and a sidewall insulating film. The semiconductor device enables the drain breakdown voltage to be sufficient and the on-resistance to decrease. A silicide layer is also formed on the surface of the gate electrode, thereby achieving gate resistance reduction and high frequency characteristics improvement.
Public/Granted literature
- US20110133273A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2011-06-09
Information query
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