Invention Grant
- Patent Title: Self-aligned semiconductor trench structures
- Patent Title (中): 自对准半导体沟槽结构
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Application No.: US13725384Application Date: 2012-12-21
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Publication No.: US08552526B2Publication Date: 2013-10-08
- Inventor: Werner Juengling , Richard Lane
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Knobbe, Martens Olson & Bear LLP
- Main IPC: H01L29/06
- IPC: H01L29/06

Abstract:
Methods for forming a semiconductor device include forming self-aligned trenches, in which a first set of trenches is used to align a second set of trenches. Methods taught herein can be used as a pitch doubling technique, and may therefore enhance device integration. Further, employing a very thin CMP stop layer, and recessing surrounding materials by about an equal amount to the thickness of the CMP stop layer, provides improved planarity at the surface of the device.
Public/Granted literature
- US20130113069A1 SELF-ALIGNED SEMICONDUCTOR TRENCH STRUCTURES Public/Granted day:2013-05-09
Information query
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