Invention Grant
US08552534B2 Laminated semiconductor substrate, semiconductor substrate, laminated chip package and method of manufacturing the same 有权
叠层半导体衬底,半导体衬底,层叠芯片封装及其制造方法

Laminated semiconductor substrate, semiconductor substrate, laminated chip package and method of manufacturing the same
Abstract:
In a laminated semiconductor substrate, a plurality of semiconductor substrates are laminated. Each of the semiconductor substrate has a plurality of scribe-groove parts formed along scribe lines. Further, each of the semiconductor substrate has a plurality of device regions having a semiconductor device formed therein and insulated from each other, and a plurality of wiring electrodes connected to the semiconductor devices respectively formed in the plurality of device regions and extending from the device regions into the inside of the scribe-groove parts. The plurality of wiring electrodes are arranged in a partial arrangement pattern in which the wiring electrodes are arranged along only a part of four boundary sides, corresponding to boundaries between each of the device regions and the scribe-groove parts. Further, the plurality of wiring electrodes extend into the scribe-groove part from only one of two device regions adjacent to each other with the scribe-groove part therebetween.
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