Invention Grant
- Patent Title: Three-dimensional semiconductor architecture
- Patent Title (中): 三维半导体架构
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Application No.: US12652900Application Date: 2010-01-06
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Publication No.: US08552563B2Publication Date: 2013-10-08
- Inventor: Oscar M. K. Law , Kuo H. Wu
- Applicant: Oscar M. K. Law , Kuo H. Wu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L23/535
- IPC: H01L23/535

Abstract:
A system and method for making semiconductor die connections with through-silicon vias (TSVs) are disclosed. TSVs are formed through the substrate to allow for signal connections as well as power and ground connections. In one embodiment this allows these connections to be made throughout the substrate instead of on the periphery of the substrate. In another embodiment, the TSVs are used as part of a power matrix to supply power and ground connections to the active devices and metallization layers through the substrate.
Public/Granted literature
- US20100252934A1 Three-Dimensional Semiconductor Architecture Public/Granted day:2010-10-07
Information query
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