Invention Grant
- Patent Title: Digital quadrature phase correction
- Patent Title (中): 数字正交相位校正
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Application No.: US12640763Application Date: 2009-12-17
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Publication No.: US08552781B2Publication Date: 2013-10-08
- Inventor: Praveen Mosalikanti , Nasser Kurd
- Applicant: Praveen Mosalikanti , Nasser Kurd
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Garrett IP, LLC
- Main IPC: H03K3/00
- IPC: H03K3/00 ; H03K5/13 ; H03H11/16

Abstract:
Methods and systems to adjust a phase difference between signals, such as to perform quadrature phase correction. First and second signals are digitally compared, such as with exclusive OR circuitry, to provide a comparison signal having a duty cycle representative of a phase difference between the signals. A phase delay of one or both of the first and second signals is adjusted until the duty cycle of the comparison signal corresponds to a desired phase difference. In a clock and data recovery system, the signals may correspond to a zero degree phase of a first phase interpolator and a ninety degree phase of a second phase interpolator, and digital codes to the first and second phase interpolators may be adjusted to provide a fifty percent duty cycle in the comparison signal.
Public/Granted literature
- US20110148498A1 DIGITAL QUADRATURE PHASE CORRECTION Public/Granted day:2011-06-23
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