An array substrate, comprising a substrate and a data line and a gate line formed on the substrate. The data line and gate line cross each other to define a pixel region and the pixel region comprises a reflective region and a transparent region. The pixel region further comprises: a pixel electrode, formed with a transparent conductive film on the substrate and provided at least in the transparent region; a thin film transistor, formed on the substrate, the transparent conductive film being retained below the gate line and a gate electrode of the thin film transistor; a planarization film, covering the thin film transistor on the substrate; and a reflective layer, formed on the planarization film and disposed in the reflective region of the pixel region. A method of manufacturing the array substrate is provided.