Invention Grant
- Patent Title: Semiconductor memory controlling device
- Patent Title (中): 半导体存储器控制装置
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Application No.: US13038845Application Date: 2011-03-02
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Publication No.: US08555027B2Publication Date: 2013-10-08
- Inventor: Tetsuro Kimura , Shigehiro Asano
- Applicant: Tetsuro Kimura , Shigehiro Asano
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-212645 20100922
- Main IPC: G06F9/26
- IPC: G06F9/26 ; G06F9/34

Abstract:
According to one embodiment, a semiconductor memory controlling device includes a write control unit that writes a predetermined number of pieces of first data and redundant information calculated by using the predetermined number of pieces of the first data and used for correcting an error in the first data into different semiconductor storage drives, respectively; a constructing unit that constructs a storage area for storing therein a table by using driver information, the table showing an association between a logical address and a physical address of the first data and identification information for associating the predetermined number of pieces of first data with the redundant information; and a table controlling unit that stores, into the storage area, the table associated with the identification information, the physical address and the logical address of the predetermined number of pieces of the first data, and a physical address of the redundant information.
Public/Granted literature
- US20120072680A1 SEMICONDUCTOR MEMORY CONTROLLING DEVICE Public/Granted day:2012-03-22
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