Invention Grant
- Patent Title: Semiconductor circuit with load balance circuit
- Patent Title (中): 具有负载平衡电路的半导体电路
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Application No.: US12996756Application Date: 2008-06-09
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Publication No.: US08555098B2Publication Date: 2013-10-08
- Inventor: Tasuku Fujibe , Yoshihito Nagata , Masakatsu Suda
- Applicant: Tasuku Fujibe , Yoshihito Nagata , Masakatsu Suda
- Applicant Address: JP Tokyo
- Assignee: Advantest Corporation
- Current Assignee: Advantest Corporation
- Current Assignee Address: JP Tokyo
- Agency: Ladas & Parry, LLP
- International Application: PCT/JP2008/001469 WO 20080609
- International Announcement: WO2009/150694 WO 20091217
- Main IPC: G06F1/00
- IPC: G06F1/00 ; G06F1/32

Abstract:
A circuit block operates while receiving a clock from an external circuit. A load balance circuit is connected to a shared power supply terminal together with the circuit block, and provides predetermined power consumption. A clock detection unit detects input of the clock from an external circuit. When the clock detection unit detects stopping of input of the clock, the load balance circuit is switched to the active state.
Public/Granted literature
- US20110109377A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2011-05-12
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