Invention Grant
US08566523B2 Multi-processor and apparatus and method for managing cache coherence of the same
有权
用于管理高速缓存一致性的多处理器和装置和方法
- Patent Title: Multi-processor and apparatus and method for managing cache coherence of the same
- Patent Title (中): 用于管理高速缓存一致性的多处理器和装置和方法
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Application No.: US12858571Application Date: 2010-08-18
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Publication No.: US08566523B2Publication Date: 2013-10-22
- Inventor: Ju-Hee Choi , HyeOn Jang , Jungyul Pyo
- Applicant: Ju-Hee Choi , HyeOn Jang , Jungyul Pyo
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2009-112096 20091119
- Main IPC: G06F13/00
- IPC: G06F13/00
Abstract:
A cache consistency management device according to example embodiments comprises a ping-pong monitoring unit monitoring a ping-pong migration sequence generated between a plurality of processors; a counting unit counting the number of successive generations of the ping-pong migration sequence in response to the monitoring result; and a request modifying unit modifying a migration request to a request of a non-migratory sharing method on the basis of the counting result.
Public/Granted literature
- US20110119450A1 MULTI-PROCESSOR AND APPARATUS AND METHOD FOR MANAGING CACHE COHERENCE OF THE SAME Public/Granted day:2011-05-19
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