Invention Grant
- Patent Title: Multiplexed read-out architecture for CMOS image sensors
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Application No.: US12366064Application Date: 2009-02-05
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Publication No.: US08570414B2Publication Date: 2013-10-29
- Inventor: Jose Tejada-Gomez
- Applicant: Jose Tejada-Gomez
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Robert D. Marshall, Jr.; Wade James Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H04N3/14
- IPC: H04N3/14 ; H04N5/335

Abstract:
This invention targets improvement in CMOS sensors using a multiplexed read-out architecture in which pixels are output at the pixel VN level instead of the line/reference amplifier level. The pixel signal voltage VN and offset voltage VNS are read sequentially, eliminating the differential structure. Interference rejection, usually achieved by a differential signal, is obtained by using a CDS (Correlated Double Sampler) in the same way as in the prior art.
Public/Granted literature
- US20100194954A1 Multiplexed Read-out Architecture for CMOS Image Sensors Public/Granted day:2010-08-05
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