Invention Grant
US08570818B2 Address multiplexing in pseudo-dual port memory 有权
伪双端口存储器中的地址复用

Address multiplexing in pseudo-dual port memory
Abstract:
A pseudo-dual port memory address multiplexing system includes a control circuit operative to identify a read request and a write request to be accomplished during a single clock cycle. A self time tracking circuit monitors a read operation and generates a switching signal when the read operation is determined to be complete. A multiplexer is responsive to the switching signal for selectively providing a read address and a write address to a memory address unit at the proper time.
Public/Granted literature
Information query
Patent Agency Ranking
0/0