Invention Grant
US08572320B1 Memory devices and systems including cache devices for memory modules 有权
内存设备和系统,包括内存模块的缓存设备

Memory devices and systems including cache devices for memory modules
Abstract:
A memory apparatus may include one or more cache memory integrated circuit (ICs), each of which may have compare circuitry that compares a received address with stored compare values, a cache memory that provides cached data in response to the compare circuitry, a controller interface having at least address and control signal input terminals, and a module output connection having at least address and control signal output terminals corresponding to the address and control signal input terminals.
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